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[VHDL-FPGA-Verilog] Released-FPGA-CODE-AD9289-RevD

Description: AD9289的控制 使用Verilog语言-AD9289 control using the Verilog language
Platform: | Size: 338944 | Author: 徐凯 | Hits:

[VHDL-FPGA-Verilog] ISE_assistant_design_tool

Description: Xilinx－ISE辅助设计工具的中文使用说明，包括IP核生成器，布局布线器，FPGA底层编辑器，时序分析器，集成化逻辑分析工具，功率分析工具-Xilinx-ISE-aided design tools for use in Chinese, including the IP core generator, layout router, FPGA Editor bottom, timing analyzer, integrated logic analysis tools, power analysis tools
Platform: | Size: 1589248 | Author: joan | Hits:

[Multimedia program] line_alaw

Description: 线性PCM到A律pcm的Verilog编码源程序-Linear PCM to the Verilog code pcm A law source
Platform: | Size: 1024 | Author: 李果霖 | Hits:

[VHDL-FPGA-Verilog] config_dac

Description: Verilog实现 spi接口的FPGA实现 通过仿真，修改后即可应用-Verilog realize spi interface FPGA to achieve through the simulation, the application can be modified
Platform: | Size: 274432 | Author: 强冰 | Hits:

[VHDL-FPGA-Verilog] DCT

Description: altera fpga verilog 设计的基于查找表的DCT程序及zigzag扫描程序，已经过matlab 和modelsim 验证，文件中包含TESTBENCH ，直接可用-altera fpga verilog design table DCT-based search procedures and zigzag scanning procedures, and ModelSim matlab has been verified, the document contains TESTBENCH, directly available
Platform: | Size: 15400960 | Author: alison | Hits:

[VHDL-FPGA-Verilog] asynch_fifo

Description: FPGA VERILOG 用DCFIFO实现 跨时钟域的数据传输，已验证，直接可用-FPGA VERILOG using DCFIFO realize cross-clock domain data transfer, has been verified, directly available
Platform: | Size: 1028096 | Author: alison | Hits:

[VHDL-FPGA-Verilog] an_dcfifo_top_restored

Description: alteral FPGA VERILOG 利用 ROM DCFIFO 和RAM 实现高速到低速时钟域的数据传输 ，值得学习。-alteral FPGA VERILOG using ROM DCFIFO and RAM to realize high-speed low-speed clock domain data transfer, it is worth learning.
Platform: | Size: 928768 | Author: alison | Hits:

[Other] fpgaandveriloghdl

Description: FPGA中嵌中高级课件,非常有用的课件，对于新手和老手都有很大的帮助！希望大家看了以后能够大大的提高自己的水平！-FPGA in the embedded high-class courseware, the courseware is very useful for both novice and veteran of great help! I hope everyone saw the future can greatly improve the level of their own!
Platform: | Size: 11936768 | Author: 乔 | Hits:

[VHDL-FPGA-Verilog] FIFO_Example2

Description: 用Verilog语言写的FPGA FIFO，仅供参考。-Verilog language used to write the FPGA FIFO, for informational purposes only.
Platform: | Size: 1024 | Author: yangyu | Hits:

[VHDL-FPGA-Verilog] RSdecoder

Description: cpld/fpga RS(204,188)译码器的verilog程序-cpld/fpga RS (204,188) decoder of the Verilog program
Platform: | Size: 13312 | Author: 陈臣 | Hits:

[Software Engineering] DDS

Description: 基于DDS原理的正弦信号发生器。用VERILOG语言实现，功能强大。-DDS based on the principle of sinusoidal signal generator. Using Verilog language and powerful.
Platform: | Size: 558080 | Author: 毛华站 | Hits:

[VHDL-FPGA-Verilog] (fpga)sdram

Description: verilog 代码，读写SDRAM 不带仿真，需要自己编写测试文件-Verilog code, read and write SDRAM simulation without the need to prepare their own test documentation
Platform: | Size: 19935232 | Author: ch | Hits:

[VHDL-FPGA-Verilog] fpgaPCI

Description: fpga开发pci的verilog，不可多得的源代码。-FPGA development pci of verilog, rare source code.
Platform: | Size: 1726464 | Author: 王军 | Hits:

[Documents] FPGA

Description: 基于 FPGA 的运动目标检测系统的研究与开发 希望有哪位朋友需要-FPGA-based Moving Target Detection System for a friend who would like to have necessary
Platform: | Size: 7645184 | Author: maolei | Hits:

[Other] lcd1602-verilog

Description: 基于QuartusII的LCD1602-Verilog 源代码，可以直接应用于FPGA开发板。-QuartusII based on the LCD1602-Verilog source code, can be directly applied to FPGA development board.
Platform: | Size: 484352 | Author: hqh | Hits:

[USB develop] USB2.0FPGA_EXAMPLES

Description: FPGA与USB通信的测试代码，包括FPGA中的程序（Verilog编写）和PC机上的主控程序以及USB固件程序。-FPGA and the USB communication test code, including the FPGA in the procedure [Verilog prepared] and PC-control procedures, as well as the USB firmware.
Platform: | Size: 5515264 | Author: 李诚铭 | Hits:

[VHDL-FPGA-Verilog] FPGA-LCD1602

Description: 基于FPGA的LCD1602显示，可根据实际内容修改显示内容-FPGA-based LCD1602 display can be modified according to the actual contents of display content
Platform: | Size: 489472 | Author: 冀少威 | Hits:

[VHDL-FPGA-Verilog] FPGA-VGA-interface

Description: 基于FPGA的VGA接口显示程序，可显示三种彩色条纹-FPGA-based interface VGA display program can display the three color stripes
Platform: | Size: 464896 | Author: 冀少威 | Hits:

[Industry research] UART_DESIGN

Description: The use of hardware description languages (HDLs) is becoming increasingly common for designing and verifying FPGA designs. Behavior level description not only increases design productivity, but also provides unique advantages for design verification. The most dominant HDLs today are Verilog and VHDL. This application note illustrates the use of Verilog in the design and verification of a digital UART (Universal Asynchronous Receiver & Transmitter).
Platform: | Size: 141312 | Author: ltrko9kd | Hits:

[VHDL-FPGA-Verilog] Simulation-and-FPGA-Implementation-of-DigitalDBPSK

Description: 文章介绍了系统的硬件电路原理与具体实现方法，其中主要包括载波恢 复电路，PN 码捕获电路和跟踪电路，并针对Xilinx 公司FPGA 的特点，对各电 路的实现进行优化设计，在不影响系统稳定性和精度的前提下，减少硬件资源 消耗，提高硬件利用率。设计利用Verilog 硬件描述语言完成，通过后仿真验证 电路正确性，并给出综合结果。-This paper introduces the system' s hardware circuit principle and the specific implementation methods, which mainly include the carrier recovery circuit, PN code acquisition circuit and track circuits, and FPGA for Xilinx company characteristics, the implementation of the circuit to optimize the design, without affecting the system stability and precision under the premise of reduced hardware resource consumption, improve hardware utilization. Designed using Verilog Hardware Description Language finish, after the passage of the correctness of circuit simulation, and give General results.
Platform: | Size: 1007616 | Author: mayuan | Hits:
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